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19-3353; Rev 0; 8/04
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter
General Description
The MAX1479 crystal-referenced phase-locked-loop (PLL) VHF/UHF transmitter is designed to transmit ASK, OOK, and FSK data in the 300MHz to 450MHz frequency range. The MAX1479 supports data rates up to 100kbps in ASK mode and 20kbps in FSK mode (both Manchester coded). The device provides an adjustable output power of more than +10dBm into a 50 load. The crystal-based architecture of the MAX1479 eliminates many of the common problems of SAW-based transmitters by providing greater modulation depth, faster frequency settling, higher tolerance of the transmit frequency, and reduced temperature dependence. These improvements enable better overall receiver performance when using the MAX1479 together with a superheterodyne receiver such as the MAX1470, MAX1471, MAX1473, or MAX7033. The MAX1479 is available in a 16-pin thin QFN package (3mm x 3mm) and is specified for the automotive temperature range from -40C to +125C. ETSI-Compliant EN300 220 +2.1V to +3.6V Single-Supply Operation Supports ASK, OOK, and FSK Modulations Adjustable FSK Shift +10dBm Output Power into 50 Load Low Supply Current (6.7mA in ASK Mode, and 10.5mA in FSK Mode) Uses Small Low-Cost Crystal Small 16-Pin Thin QFN Package Fast-On Oscillator--200s Startup Time Programmable Clock Output
Features
MAX1479
Applications
Remote Keyless Entry Tire Pressure Monitoring Security Systems Radio-Controlled Toys Wireless Game Consoles Wireless Computer Peripherals Wireless Sensors RF Remote Controls Garage Door Openers
PART MAX1479ATE
Ordering Information
TEMP RANGE -40C to +125C PIN-PACKAGE 16 Thin QFN-EP*
*EP = Exposed paddle.
Typical Application Circuit appears at end of data sheet.
Functional Diagram
XTAL2 XTAL1 DEV2 GND
Pin Configuration
XTAL2 XTAL1 DEV2
TOP VIEW
GND
16
15
14
13
VDD
1
CRYSTAL DRIVER
DEVIATION
12 DEV1
16 VDD 1 2 3 4 5
CLKOUT
15
14
13 12
DEV1 DEV0 CLK1 CLK0
PD/CP MODE 2 ASK FSK DIN 3 DIVIDE BY 32
LOOP FILTER 11 DEV0 VCO 10 CLK1
MODE DIN ENABLE
MAX1479
EP
11 10 9
MAX1479
ENABLE 4 CLOCK DIVIDER ENVELOPE SHAPING
PA 9 CLK0
6
VDD_PA
7
ROUT
8
PAOUT
5 CLKOUT
6 VDD_PA
7 ROUT
8 PAOUT
THIN QFN (3mm x 3mm)
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
ABSOLUTE MAXIMUM RATINGS
VDD to GND .............................................................-0.3V to +4V All Other Pins to GND ................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70C) 16-Pin Thin QFN (derate 14.7mW/C above +70C)...1176.5mW Operating Temperature Range .........................-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-60C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, all RF inputs and outputs are referenced to 50, VDD = +2.1V to +3.6V, VENABLE = VDD, TA = -40C to +125C, unless otherwise noted. Typical values are at VDD = +2.7V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Supply Voltage SYMBOL VDD PA off, VDIN at 0% duty cycle (ASK or FSK) (Note 2) Supply Current IDD VDIN at 50% duty cycle (ASK) (Notes 3, 4) VDIN at 100% duty cycle (FSK) Standby Current DIGITAL INPUTS AND OUTPUTS Data Input High Data Input Low Maximum Input Current Output Voltage High Output Voltage Low VIH VIL IIN VOH VOL CLKOUT, load = 10k || 10pF (Note 4) CLKOUT, load = 10k || 10pF (Note 4) VDD 0.25 0.25 (Note 2) (Note 2) 20 VDD 0.25 0.25 V V A V V ISTDBY VENABLE < VIL fRF = 315MHz fRF = 433MHz fRF = 315MHz fRF = 433MHz fRF = 315MHz (Note 2) fRF = 433MHz (Note 4) TA = +25C TA < +85C (Note 4) TA < +125C (Note 2) CONDITIONS MIN 2.1 2.9 3.3 6.7 7.3 10.5 11.4 0.2 120 700 300 1600 nA TYP MAX 3.6 4.3 4.8 10.7 11.4 17.1 18.1 mA UNITS V
2
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300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, all RF inputs and outputs are referenced to 50, VDD = +2.1V to +3.6V, VENABLE = VDD, TA = -40C to +125C, unless otherwise noted. Typical values are at VDD = +2.7V, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER SYSTEM PERFORMANCE Frequency Range Turn-On Time (Note 5) Maximum Data Rate (Note 4) Maximum FSK Frequency Deviation Output Power (Note 2) Transmit Efficiency with CW Tone (Note 7) Transmit Efficiency at 50% Duty Cycle PHASE-LOCKED-LOOP PERFORMANCE VCO Gain KVCO fRF = 315MHz Phase Noise fRF = 433MHz Maximum Carrier Harmonics Reference Spur Loop Bandwidth Crystal Frequency Range Crystal Tolerance Crystal Load Capacitance Clock Output Frequency CLOAD (Note 8) Determined by CLK0 and CLK1; see Table 1 BW fXTAL fRF = 315MHz fRF = 433MHz fOFFSET = 100kHz fOFFSET = 1MHz fOFFSET = 100kHz fOFFSET = 1MHz 280 -75 -98 -74 -98 -50 -45 -40 300 fRF/32 50 4.5 FXTAL / N dBc dBc kHz MHz ppm pF MHz dBc/Hz MHz/V POUT fRF tON (Note 2) Settle to within 50kHz Settle to within 5kHz ASK mode (Manchester coded) FSK mode (Manchester coded) DEV[2:0] = 111 (Note 6) fRF = 315MHz fRF = 433MHz 6.8 2.7 300 200 350 100 20 55 80 10 5.3 12.2 35 34 27 25 16.1 % % 12.0 dBm 450 MHz s kbps kHz SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1479
TA = +25C, VDD = +2.7V TA = +125C, VDD = +2.1V TA = -40C, VDD = +3.6V fRF = 315MHz fRF = 433MHz fRF = 315MHz fRF = 433MHz
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8:
Supply current, output power, and efficiency are greatly dependent on board layout and PAOUT match. 100% tested at TA = +125C. Guaranteed by design and characterization over temperature. 50% duty cycle at 10kHz ASK data (Manchester coded). Guaranteed by design and characterization, not production tested. VENABLE = VIL to VENABLE = VIH. fOFFSET is defined as the frequency deviation from the desired carrier frequency. Dependent on crystal and PC board trace capacitance. VENABLE > VIH, VDATA > VIH, Efficiency = POUT / (VDD x IDD). Dependent on PC board trace capacitance.
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300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Typical Operating Characteristics
(Typical Application Circuit, VDD = +2.7V, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1479 toc01
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1479 toc02
SUPPLY CURRENT vs. SUPPLY VOLTAGE
14 SUPPLY CURRENT (mA) 13 12 TA = +25C 11 10 9 TA = +85C TA = +125C fRF = 433MHz PA ON TA = -40C
MAX1479 toc03
15 14 SUPPLY CURRENT (mA) 13 12 TA = +25C 11 10 9 8 7 2.1 2.4 2.7 3.0 3.3 TA = +85C TA = +125C fRF = 315MHz PA ON TA = -40C
10.0 9.5 9.0 SUPPLY CURRENT (mA) 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 TA = -40C TA = +125C TA = +25C TA = +85C fRF = 315MHz PA 50% DUTY CYCLE AT 10kHz
15
8 7 3.3 3.6 2.1 2.4 2.7 3.0 3.3 3.6
3.6
2.1
2.4
2.7
3.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX1479 toc04
SUPPLY CURRENT vs. OUTPUT POWER
MAX1479 toc05
SUPPLY CURRENT vs. OUTPUT POWER
11 10 SUPPLY CURRENT (mA) 9 8 7 6 5 4 3 2 50% DUTY CYCLE PA ON fRF = 433MHz
MAX1479 toc06
10.0 9.5 9.0 SUPPLY CURRENT (mA) 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 2.1 2.4 2.7 3.0 3.3 TA = -40C TA = +125C TA = +25C TA = +85C fRF = 433MHz PA 50% DUTY CYCLE AT 10kHz
12 11 10 SUPPLY CURRENT (mA) 9 8 7 6 5 4 3 2 50% DUTY CYCLE PA ON fRF = 315MHz
12
3.6
-14
-10
-6
-2
2
6
10
-14
-10
-6
-2
2
6
10
SUPPLY VOLTAGE (V)
AVERAGE OUTPUT POWER (dBm)
AVERAGE OUTPUT POWER (dBm)
SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR
18 16 SUPPLY CURRENT (mA) 14 12 10 8 6 4 2 0.1 1 10 100 1k 10k EXTERNAL RESISTOR () CURRENT fRF = 315MHz PA ON POWER
MAX1479 toc07
SUPPLY CURRENT AND OUTPUT POWER vs. EXTERNAL RESISTOR
16 12 SUPPLY CURRENT (mA) OUTPUT POWER (dBm) 8 4 0 -4 -8 -12 -16 18 16 14 12 10 8 6 4 2 0.1 1 10 100 1k 10k EXTERNAL RESISTOR () CURRENT fRF = 433MHz PA ON POWER
MAX1479 toc08
16 12 OUTPUT POWER (dBm) 8 4 0 -4 -8 -12 -16
4
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300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Typical Operating Characteristics (continued)
(Typical Application Circuit, VDD = +2.7V, TA = +25C, unless otherwise noted.)
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX1479 toc09
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX1479 toc10
OUTPUT POWER vs. SUPPLY VOLTAGE
fRF = 315MHz PA ON ENVELOPE SHAPING DISABLED TA = +25C
MAX1479 toc11
16 14 OUTPUT POWER (dBm) 12 10 TA = +85C 8 TA = +125C 6 4 2.1 2.4 2.7 3.0 3.3 fRF = 315MHz PA ON TA = -40C TA = +25C
16 14 OUTPUT POWER (dBm) 12 10 TA = +85C 8 TA = +125C 6 4 fRF = 433MHz PA ON TA = -40C TA = +25C
16 14 OUTPUT POWER (dBm) 12 10 TA = +85C 8 TA = +125C 6 4 TA = -40C
3.6
2.1
2.4
2.7
3.0
3.3
3.6
2.1
2.4
2.7
3.0
3.3
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX1479 toc12
PHASE NOISE vs. OFFSET FREQUENCY
-50 -60 PHASE NOISE (dBc/Hz) -70 -80 -90 -100 -110 -120 -130 fRF = 433MHz fRF = 315MHz
MAX1479 toc13
16 14 OUTPUT POWER (dBm) 12 10 8 TA = +125C 6 4 2.1 2.4 2.7 3.0 3.3 fRF = 433MHz PA ON ENVELOPE SHAPING DISABLED TA = +25C TA = -40C
-40
TA = +85C
-140 3.6 100 1k 10k 100k 1M 10M SUPPLY VOLTAGE (V) OFFSET FREQUENCY (Hz)
CLOCK SPUR MAGNITUDE vs. SUPPLY VOLTAGE
MAX1479 toc14
FREQUENCY STABILITY vs. SUPPLY VOLTAGE
8 FREQUENCY STABILITY (ppm) 6 4 2 0 -2 -4 -6 -8 fRF = 433MHz fRF = 315MHz
MAX1479 toc15
-40 CLKOUT SPUR MAGNITUDE (dBc) -45 -50 -55 -60 -65 -70 2.1 2.4 2.7 3.0 3.3 fCLKOUT = fXTAL/4 fRF = 315MHz CLKOUT SPUR = fRF fCLKOUT 10pF LOAD CAPACITANCE fCLKOUT = fXTAL/16
10
fCLKOUT = fXTAL/8
-10 3.6 2.1 2.4 2.7 3.0 3.3 3.6 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
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300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 -- NAME VDD MODE DIN ENABLE CLKOUT VDD_PA ROUT PAOUT CLK0 CLK1 DEV0 DEV1 DEV2 XTAL1 XTAL2 GND EP DESCRIPTION Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as possible. Mode Select. A logic low on MODE enables the device in ASK mode. A logic high on MODE enables the device in FSK mode. Data Input. Power amplifier is on when DIN is high in ASK mode. Frequency is high when DIN is high in FSK mode. Standby/Power-Up Input. A logic low on ENABLE sets the device in standby mode. Buffered Clock Output. Programmable through CLK0 and CLK1. See Table 1. Power-Amplifier Supply Voltage. Bypass to GND with a 10nF and 220pF capacitor as close to the pin as possible. Envelope-Shaping Output. ROUT controls the power-amplifier envelope rise and fall. Bypass to GND with a 680pF and 220pF capacitor as close to the pin as possible. Power-Amplifier Output. Requires a pullup inductor to the supply voltage, which can be part of the outputmatching network to an antenna. 1st Clock Divider Setting. See Table 1. 2nd Clock Divider Setting. See Table 1. 1st FSK Frequency-Deviation Setting. See Table 2. 2nd FSK Frequency-Deviation Setting. See Table 2. 3rd FSK Frequency-Deviation Setting. See Table 2. 1st Crystal Input. fRF = 32 x fXTAL. 2nd Crystal Input. fRF = 32 x fXTAL. Ground. Connect to system ground. Exposed Ground Paddle. EP is the power amplifier's ground. It must be connected to PC board through a low-inductance path.
Detailed Description
The MAX1479 is a highly integrated ASK/FSK transmitter operating over the 300MHz to 450MHz frequency band. The device requires only a few external components to complete a transmitter solution. The MAX1479 includes a complete PLL and a highly efficient power amplifier. The device can be set into a 0.2nA low-power shutdown mode.
oscillator is running, the 300kHz PLL bandwidth allows fast frequency recovery during power-amplifier toggling.
Mode Selection
MODE (pin 2) sets the MAX1479 in either ASK or FSK mode. When MODE is set low, the device operates as an ASK transmitter. If MODE is set high, the device operates as an FSK transmitter. In the ASK mode, the DIN pin controls the output of the power amplifier. A logic low on DIN turns off the PA, and a logic high turns on the PA. In the FSK mode, a logic low on the DIN pin is represented by the low FSK frequency, and a logichigh input is represented by the high FSK frequency. (The ASK carrier frequency and the lower FSK frequency are the same.) The deviation is proportional to the crystal load impedance and pulling capacitance. The maximum frequency deviation is 55kHz for f RF = 315MHz and 80kHz for fRF = 433MHz.
Shutdown Mode
ENABLE (pin 4) is internally pulled down with a 20A current source. If it is left unconnected or pulled low, the MAX1479 goes into a low-power shutdown mode. In this mode, the supply current drops to 0.2nA. When ENABLE is high, the device is enabled and is ready for transmission after 200s (frequency settles to within 50kHz). The 200s turn-on time of the MAX1479 is mostly dominated by the crystal oscillator startup time. Once the
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300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter
Clock Output
The MAX1479 has a dedicated digital output pin for the frequency-divided crystal clock signal. This is to be used as the time base for a microprocessor. The frequency-division ratio is programmable through two digital input pins (CLK0, CLK1), and is defined in Table 1. The clock output is designed to drive a 3.5MHz CMOS rail-to-rail signal into a 10pF capacitive load.
Table 1. Clock Divider Settings
CLK1 0 0 1 1 CLK0 0 1 0 1 CLKOUT Logic 0 fXTAL / 4 fXTAL / 8 fXTAL / 16
MAX1479
Envelope-Shaping Resistor
The envelope-shaping resistor allows for a gentle turnon/turn-off of the PA in ASK mode. This results in a smaller spectral width of the modulated PA output signal.
Table 2. Frequency-Deviation Settings
DEV2 0 0 0 0 1 1 1 1 DEV1 0 0 1 1 0 0 1 1 DEV0 0 1 0 1 0 1 0 1 DEVIATION 1/8 x max 1/4 x max 3/8 x max 1/2 x max 5/8 x max 3/4 x max 7/8 x max Max
Phase-Locked Loop
The PLL block contains a phase detector, charge pump, integrated loop filter, VCO, asynchronous 32x clock divider, and crystal oscillator. The PLL requires no external components. The relationship between the carrier and crystal frequency is given by: fXTAL = fRF / 32
Crystal Oscillator
The crystal oscillator in the MAX1479 is designed to present a capacitance of approximately 3pF to ground from the XTAL1 and XTAL2 pins in ASK mode. In most cases, this corresponds to a 4.5pF load capacitance applied to the external crystal when typical PC board parasitics are added. In FSK mode, a percentage (defined by bits DEV0 to DEV2) of the 3pF internal crystal oscillator capacitance is removed for a logic 1 on the DIN pin to pull the transmit frequency. The frequency deviation is shown in Table 2. It is very important to use a crystal with a load capacitance that is equal to the capacitance of the MAX1479 crystal oscillator plus PC board parasitics. If very large FSK frequency deviations are desired, use a crystal with a larger motional capacitance and/or reduce PC board parasitic capacitances.
Application Circuit delivers +10dBm at a supply voltage of +2.7V, and draws a supply current of 6.7mA for ASK/OOK operation (V DIN at 50% duty cycle) and 10.5mA for FSK operation. Thus, the overall efficiency at 100% duty cycle is 35%. The efficiency of the power amplifier itself is about 50%. An external resistor at ROUT sets the output power.
Applications Information
Output Matching to 50
When matched to a 50 system, the MAX1479 PA is capable of delivering more than +10dBm of output power at VDD = 2.7V. The output of the PA is an opendrain transistor that requires external impedance matching and pullup inductance for proper biasing. The pullup inductance from PAOUT to VDD serves three main purposes: It forms a resonant tank circuit with the capacitance of the PA output, provides biasing for the PA, and becomes a high-frequency choke to reduce the RF energy coupling into VDD. Maximum efficiency is achieved when the PA drives a load of 250. The recommended output-matching network topology is shown in the Typical Application Circuit.
Power Amplifier
The PA of the MAX1479 is a high-efficiency, open-drain, class-C amplifier. With a proper output-matching network, the PA can drive a wide range of impedances, including small-loop PC board trace antennas and any 50 antennas. The output-matching network for a 50 antenna is shown in the Typical Application Circuit. The output-matching network suppresses the carrier harmonics and transforms the antenna impedance to an optimal impedance at PAOUT (pin 8), which is about 250. When the output-matching network is properly tuned, the power amplifier is highly efficient. The Typical
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7
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Output Matching to PC Board Loop Antenna
In most applications, the MAX1479 power-amplifier output has to be impedance matched to a small-loop antenna. The antenna is usually fabricated out of a copper trace on a PC board in a rectangular, circular, or square pattern. The antenna has an impedance that consists of a lossy component and a radiative component. To achieve high radiating efficiency, the radiative component should be as high as possible, while minimizing the lossy component. In addition, the loop antenna has an inherent loop inductance associated with it (assuming the antenna is terminated to ground). For example, in a typical application, the radiative impedance is less than 0.5, the lossy impedance is less than 0.7, and the inductance is approximately 50nH to 100nH. The objective of the matching network is to match the power-amplifier output to the impedance of the smallloop antenna. The matching components thus tune out the loop inductance and transform the low radiative and resistive parts of the antenna into the much higher value of the PA output. This gives higher efficiency. The low radiative and lossy components of the small-loop antenna result in a higher Q matching network than the 50 network; thus, the harmonics are lower.
Layout Considerations
A properly designed PC board is an essential part of any RF/microwave circuit. On the power-amplifier output, use controlled-impedance lines and keep them as short as possible to minimize losses and radiation. Keeping the traces short reduces parasitic inductance. Generally, 1in of PC board trace adds about 20nH of parasitic inductance. Parasitic inductance can have a dramatic effect on the effective inductance. For example, a 0.5in trace connecting a 100nH inductor adds an extra 10nH of inductance, or 10%. To reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. Using a solid ground plane can reduce the parasitic inductance from approximately 20nH/in to 7nH/in. Also, use low-inductance connections to ground on all GND pins and place decoupling capacitors close to all VDD connections.
Chip Information
TRANSISTOR COUNT: 2369 PROCESS: CMOS
Table 3. Component Values for Typical Application Circuit
COMPONENT L1 L3 C1 C2 C3 C4 C6 C8 C10 C11 C12 C14 C15 VALUE FOR fRF = 433MHz 22nH 18nH 6.8pF 10pF 10nF 680pF 6.8pF 220pF 10nF 220pF 220pF 100pF 100pF VALUE FOR fRF = 315MHz 27nH 22nH 15pF 22pF 10nF 680pF 15pF 220pF 10nF 220pF 220pF 100pF 100pF
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_______________________________________________________________________________________
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Typical Application Circuit
C15 XTAL2 XTAL1 GND
C14 DEV2 13 FREQUENCYDEVIATION INPUTS
VCC VDD C10 C11
16
15
14
1
CRYSTAL DRIVER
DEVIATION
12
DEV1
MODE-SELECT INPUT
MODE
PD/CP 2 ASK FSK DIVIDE BY 32
LOOP FILTER 11 VCO 10
DEV0
DATA INPUT
DIN
3
CLK1 CLOCKDIVIDER INPUTS
MAX1479
ENABLE INPUT ENABLE 4 CLOCK DIVIDER ENVELOPE SHAPING
PA 9 CLK0
5 CLKOUT VDD_PA
6
7 ROUT
8 PAOUT C1 C2
L1 C4
VCC
CLOCK OUTPUT
C12 C3 C8
L3 C6
RF OUTPUT
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9
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter MAX1479
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
D2 b
0.10 M C A B
D D/2
D2/2
E/2
E2/2
C L
E
(NE - 1) X e
E2
L
C L
e
k (ND - 1) X e
C L
0.10 C 0.08 C A A2 A1 L
C L
L
e
e
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
1
2
10
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12x16L QFN THIN.EPS
300MHz to 450MHz Low-Power, Crystal-Based +10dBm ASK/FSK Transmitter
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX1479
EXPOSED PAD VARIATIONS
DOWN BONDS ALLOWED
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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